1. Field of the Invention
The invention relates generally to the ion implantation systems and methods employed in the fabrication process for manufacturing semiconductor devices. More particularly, this invention relates to the implantation systems and fabrication process for manufacturing semiconductor devices that include shallow p-type or n-type regions.
2. Description of the Prior Art
As the overall dimensions of semiconductor devices are miniaturized and made ever smaller, it is often required to form very shallow p-doped regions. These shallow p-regions might have junction depth less than quarter-micron. Difficulties arising from satisfying requirements to form such shallow p-type regions, however, often become a major limiting factor in the fabrication process to further shrink the size of the semiconductor devices. This is a common situation faced by those skilled in the art in making metal oxide semiconductor field-effect transistors (MOSFET) and complementary metal oxide semiconductor (CMOS) devices. As will be further explained below, the conventional techniques, which apply a conventional ion implantation system with ion source well known in the art, are not able to resolve these difficulties encountered in the semiconductor industry.
The method used to make these vital CMOS and MOSFET transistors involves the formation of n-type and p-type-doped regions, most frequently by ion implantation. Shallow n-doped regions can easily be formed by the ion implantation of arsenic or other n-type dopants. However, technical difficulties currently hamper the formation of very shallow p-doped regions. In most semiconductor fabrication processes the dopant boron is used to form p-type regions. Because boron has a very low atomic number (Z=5), a very low implantation energy must be used to keep the dopant in the shallow surface region necessary for small geometry devices. Even those different kind of implantation systems are well known and commonly used, however, traditional techniques of ion implantation are limited in their ability to produce low Z dopants with very low implantation energies. These limitations effect both the stability and reliability of shallow p-junctions. Furthermore, due to its low atomic number, implanted boron tends to channel through crystalline substrates and therefore forms a very undesirable, deep, `implantation profile tail`, in which the concentration of the dopant can not be accurately controlled. This `channeling tail` creates great difficulties in the ability to clearly define the junction depth of boron implanted shallow p-type regions. This inability to control the junction depth seriously degrades device performance. All in all, it is not feasible to use conventional low energy implantation technology to implant boron and form shallow p-regions for very-large scale integrated (VLSI) circuits.
Several techniques are currently used to try to reduce the technical difficulties associated with low energy boron implantation. In one case, the technique involves implanting a heavier compound ion, i.e., BF2, to form the shallow p-region. Due to the higher mass of the compound, the constituent atoms of the BF.sub.2 ion have a shallower penetration depth for a given ion energy, thus enabling the formation of shallower p-type regions. The BF.sub.2 ions provide another key advantage because they help reduce problems caused by a channeling-effect This improvement is accomplished by the increased crystal damage caused by the heavier fluorine component of the compound ion. However, since fluorine is neither a p-type nor a n-type dopant, the fluorine atoms that are introduced from the BF2 ions do not directly contribute to the electrical performance of the semiconductor device.
The implantation of fluorine from the BF.sub.2 compound generates a new set of problems. Due to their low solubility in silicon, the fluorine atoms tend to migrate, particularly if the substrate is heated. After a BF.sub.2 implantation, any subsequent fabrication process, which uses elevated temperatures, will tend to cause the implanted fluorine to migrate to the silicon surface, i.e., silicon-oxide interface. In some cases, this migration may cause the fluorine to coalesce and form a gap at the interface. Several different contact problems can be caused by migrating fluorine including; poor contact reliability, high contact resistance, and unstable electrical performance.
In addition to the contact problems caused the migration of fluorine, implantation of BF.sub.2 ions with energies less than 15 KeV can be difficult. This difficulty in turn limits the minimum depth of implantation and thus limits the miniaturization of integrated circuit (IC) devices in VLSI and ULSI applications.
Several types of ion implantation systems with different ion sources to produce different ion beams are available for performing the above discussed ion implantation operations. In an earlier U.S. Pat. No. 3,955,188 by Flemming, entitled "Cold-cathode Ion Source" (issued on May 4, 1976), a cold cathode ion source is disclosed. Gases are introduced into a vacuum chamber. Specially shaped hollow anode and cathode electrodes are applied to produce a plasma discharge. The system can also be implemented with a solid feed of source. An oven anode with cavities can be applied to vaporize the solid source. In U.S. Pat. No. 5,148,034 entitled "Ion Implantation Method" (issued on Sep. 15, 1992), Koike discloses a method of ion implantation for semiconductor devices to neutralize charge stored on a wafer. The ion implantation system includes ion extracting, analyzing, accelerating, focusing, and deflecting sections. The ion implantation system further includes an ion impinging section for impinging a positive ion beam on particular positions on the wafers. In U.S. Pat. No. 5,178,739, entitled "Apparatus for Depositing Material into High Aspect Ratio Holes", Barnes et al. disclose a sputter deposition system where radio-frequency (RF) energy is applied in a vacuum chamber to produce charged plasma particles. Magnetic guiding system are then implemented to direct the ion beams into holes with high aspect ratio. In another U.S. Pat. No. 5,089,710, entitled "Ion Implantation Equipment" by Kikuchi et al. wherein ion implantation equipment for implanting ion beam into an implanting target is disclosed. Plasma is generated and electron beam generated by the plasma is induced to an ion beam. The ion implantation system includes a Faraday for enclosing the ion beam before the implanting target. A plasma generation chamber shares a common wall surface with the Faraday. A variable bias voltage is then applied to the Faraday to direct the electron beam generated from an electron discharge source. In another U.S. Pat. No. 5,482,611, entitled "Physical Vapor Deposition Employing Ion Extraction From a Plasma", (issued on Jan. 9, 1996), Helmer et al. disclose a sputter magnetron ion source for producing an intense plasma. The plasma is produced in a cathode container where a high percentage of sputter cathode material is vaporized. An extracting means is implemented to extract the ions of the cathode material in a beam. A magnetic cusp is implemented to form this ion extracting means.
Other than the above ion beam producing and ion implantation systems, there is a different type of ion beam producing system where the ion beams are produced by bombarding a target with a low-work-function surface. In U.S. Pat. No. 4,377,773, Hershcovitch et al. disclose a negative ion source formed by bombarding a low-work-function surface with positive ions and neutral particles from a plasma. The highly ionized plasma is injected into an anode space containing the low-work-function surface. The plasma is formed by hollow cathode discharge and the plasma is injected into the anode space along the magnetic field. The negative ion source is of the magnetron types.
As the implantation systems disclosed in the prior art Patents can be employed to carry out the invention disclosed in this invention, the subject matters disclosed and discussed in U.S. Pat. Nos. 3,955,118, 4,377,773, 5,178,739, 5,178,743, 5,089,710, 5,343,047, 5,148,034, and 5,482,611 are incorporated herein in this Application by reference. However, even that different types of implantation systems are available, the difficulties and limitations faced by the semiconductor industry in forming a shallow p-type region still are a major hindrance to device miniaturization and reliability improvement.
In addition to the difficulties for implanting the p-type dopant ions as described above, similar difficulties may also arise in forming the shallow n-type regions. Current technology of implanting n-type regions with ion dopant compounds containing phosphorous and arsenic is adequate because the heavier weight of phosphorous, arsenic, and other kinds of n-type elements. Thus, n-type dopant compounds do not have the same difficulties as that encountered in the p-type dopants for implanting shallow regions. However, further scale down of the integrated circuit (IC) devices in the near future will certainly require the n-type regions to have shallower junctions. Therefore, when n-type regions with smaller junction depths than the current requirements become necessary, same difficulties, similar to that for forming a shallow p-type region, would also be limiting to the manufacture of IC devices.
For all the above reasons, traditional techniques of employing BF.sub.2 as source of ion implantation using any types of ion implantation systems as described above is not a viable solution for the difficulties currently associated with the fabrication of shallow p-type and n-type regions. There is a profound need in the art of IC device fabrication, to provide new implantation system using new implanting sources, particularly for devices requiring shallow p-type and n-type regions, to resolve these difficulties and limitations by new fabrication equipment and methods.